ppc64: Implement Iop_ReinterpF32asI64

Intrumenting the ppc64 floating point form of store instructions need Iop_ReinterpF32asI64 to be defined. Reviewed-By: Carl Love <cel@us.ibm.com> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
pmem · Jan 4, 2023 · 95c4e87 · 95c4e87
1 parent b21a0ab
commit 95c4e87
Show file tree

Hide file tree

Showing 6 changed files with 34 additions and 2 deletions.
diff --git a/VEX/priv/host_ppc_isel.c b/VEX/priv/host_ppc_isel.c
@@ -2452,6 +2452,25 @@ static HReg iselWordExpr_R_wrk ( ISelEnv* env, const IRExpr* e,
             return r_dst;
          } 
          break;
+      case Iop_ReinterpF32asI64:
+        if (mode64) {
+            HReg fr_src = iselFltExpr(env, e->Iex.Unop.arg, IEndianess);
+            HReg r_dst = newVRegI(env);
+            PPCAMode* am_addr;
+
+            sub_from_sp( env, 16 );        // Move SP down 16 bytes
+            am_addr = PPCAMode_IR( 0, StackFramePtr(mode64) );
+
+            // store as F32
+            addInstr(env, PPCInstr_FpLdSt( False/*store*/, 4,
+                                        fr_src, am_addr ));
+            // load as Ity_I64
+            addInstr(env, PPCInstr_Load( 8, r_dst, am_addr, mode64 ));
+
+            add_to_sp( env, 16 );          // Reset SP
+            return r_dst;
+        }
+	break;
 
       case Iop_BCDtoDPB: {
          /* the following is only valid in 64 bit mode */

diff --git a/VEX/priv/ir_defs.c b/VEX/priv/ir_defs.c
@@ -450,6 +450,7 @@ void ppIROp ( IROp op )
       case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
       case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
       case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
+      case Iop_ReinterpF32asI64: vex_printf("ReinterpF32asI64"); return;
       case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
 
       case Iop_I32UtoF32x4_DEP: vex_printf("I32UtoF32x4_DEP"); return;
@@ -1449,7 +1450,7 @@ Bool primopMightTrap ( IROp op )
    case Iop_F32toI32U: case Iop_F32toI64U: case Iop_I32StoF32:
    case Iop_I64StoF32: case Iop_F32toF64: case Iop_F64toF32:
    case Iop_ReinterpF64asI64: case Iop_ReinterpI64asF64:
-   case Iop_ReinterpF32asI32: case Iop_ReinterpI32asF32:
+   case Iop_ReinterpF32asI32: case Iop_ReinterpF32asI64: case Iop_ReinterpI32asF32:
    case Iop_ReinterpV128asI128: case Iop_ReinterpI128asV128:
    case Iop_ReinterpF128asI128: case Iop_ReinterpI128asF128:
    case Iop_F64HLtoF128: case Iop_F128HItoF64: case Iop_F128LOtoF64:
@@ -3494,6 +3495,7 @@ void typeOfPrimop ( IROp op,
       case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64);
       case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32);
       case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32);
+      case Iop_ReinterpF32asI64: UNARY(Ity_F32, Ity_I64);
 
       case Iop_I128StoF128: BINARY(ity_RMode, Ity_I128, Ity_F128);
       case Iop_I128UtoF128: BINARY(ity_RMode, Ity_I128, Ity_F128);

diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h
@@ -708,7 +708,8 @@ typedef
       Iop_ReinterpV128asI128, Iop_ReinterpI128asV128,
       Iop_ReinterpF128asI128, Iop_ReinterpI128asF128,
       Iop_ReinterpF64asI64, Iop_ReinterpI64asF64,
-      Iop_ReinterpF32asI32, Iop_ReinterpI32asF32,
+      Iop_ReinterpF32asI32, Iop_ReinterpF32asI64,
+      Iop_ReinterpI32asF32,
 
       /* Support for 128-bit floating point */
       Iop_F64HLtoF128,/* (high half of F128,low half of F128) -> F128 */

diff --git a/memcheck/mc_translate.c b/memcheck/mc_translate.c
@@ -5163,6 +5163,7 @@ IRExpr* expr2vbits_Unop ( MCEnv* mce, IROp op, IRAtom* atom )
          return mkPCastTo(mce, Ity_I128, vatom);
 
       case Iop_F16toF64:
+      case Iop_ReinterpF32asI64:
       case Iop_F32toF64: 
       case Iop_I32StoF64:
       case Iop_I32UtoF64:

diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c
@@ -244,6 +244,7 @@ static irop_t irops[] = {
   { DEFOP(Iop_ReinterpF64asI64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
   { DEFOP(Iop_ReinterpI64asF64, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
   { DEFOP(Iop_ReinterpF32asI32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
+  { DEFOP(Iop_ReinterpF32asI64, UNDEF_ALL), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
   // ppc requires this op to show up in a specific context. So it cannot be
   // tested standalone on that platform.
   { DEFOP(Iop_ReinterpI32asF32, UNDEF_SAME), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },

diff --git a/pmemcheck/pmc_main.c b/pmemcheck/pmc_main.c
@@ -884,6 +884,9 @@ tmp_needs_widen(IRType type)
         case Ity_I8:
         case Ity_I16:
         case Ity_I32:
+#       if (defined(VGA_ppc64be) || defined(VGA_ppc64le))
+        case Ity_F32:
+#       endif
             return True;
 
         default:
@@ -969,6 +972,11 @@ widen_operation(IRSB *sb, IRAtom *e)
         case Ity_I32:
             return Iop_32Uto64;
 
+#       if (defined(VGA_ppc64be) || defined(VGA_ppc64le))
+        case Ity_F32:
+            return Iop_ReinterpF32asI64;
+#       endif
+
         default:
             tl_assert(False); /* cannot happen */
     }