Add openjdk riscv64 update

plctlab · Jul 11, 2024 · 3a5c2e7 · 3a5c2e7
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diff --git a/2024/2024-07-01.md b/2024/2024-07-01.md
@@ -42,6 +42,31 @@ RuyiSDK 整体的 0.12 与 0.13 两个正式版本。您可移步
 ## Spidermonkey
 
 ## OpenJDK Upstream
+1. Reviewed JDK-mainline PRs:
+- https://github.com/openjdk/jdk/pull/18226 (8327964: Simplify BigInteger.implMultiplyToLen intrinsic)
+- https://github.com/openjdk/jdk/pull/18967 (8330685: ZGC: share barrier spilling logic)
+- https://github.com/openjdk/jdk/pull/19026 (8331418: ZGC: generalize barrier liveness logic)
+- https://github.com/openjdk/jdk/pull/19011 (8331393: AArch64: u32 _partial_subtype_ctr loaded/stored as 64)
+- https://github.com/openjdk/jdk/pull/18919 (8321008: RISC-V: C2 MulAddVS2VI)
+- https://github.com/openjdk/jdk/pull/18942 (8326306: RISC-V: Re-structure MASM calls and jumps)
+- https://github.com/openjdk/jdk/pull/19246 (8332265: RISC-V: Materialize pointers faster by using a temp register)
+- https://github.com/openjdk/jdk/pull/19010 (8331360: RISCV: u32 _partial_subtype_ctr loaded/stored as 64)
+- https://github.com/openjdk/jdk/pull/19014 (8331399: RISC-V: Don't us mv instead of la)
+- https://github.com/openjdk/jdk/pull/19065 (8320995: RISC-V: C2 PopCountVI
+                                             8320996: RISC-V: C2 PopCountVL)
+- https://github.com/openjdk/jdk/pull/19120 (8322753: RISC-V: C2 ReverseBytesV)
+- https://github.com/openjdk/jdk/pull/19153 (8331577: RISC-V: C2 CountLeadingZerosV
+                                             8331578: RISC-V: C2 CountTrailingZerosV)
+- https://github.com/openjdk/jdk/pull/19325 (8320999: RISC-V: C2 RotateLeftV
+                                             8321000: RISC-V: C2 RotateRightV)
+- https://github.com/openjdk/jdk/pull/19211 (8332130: RISC-V: remove wrong instructions of Vector Crypto Extension)
+- https://github.com/openjdk/jdk/pull/19265 (8332153: RISC-V: enable tests and add comment for vector shift instruct (shared by vectorization and Vector API))
+- https://github.com/openjdk/jdk/pull/19313 (8332533: RISC-V: Enable vector variable shift instructions for machines with RVV)
+- https://github.com/openjdk/jdk/pull/19328 (8332615: RISC-V: Support vector unsigned comparison instructions for machines with RVV)
+
+2. Porting and debugging of virtual thread pinning issue on RISC-V
+- Initial version: https://github.com/openjdk/loom/commit/4c2bb3110d886ed35d75486ba3b4995b1f925ebc (RISC-V vthread support for JVM intrinsic monitors)
+- Needs further debugging to enable C1 & C2 JIT mode
 
 ## OpenJDK RV32G