[CVPR 2024] MagicAnimate: Temporally Consistent Human Image Animation using Diffusion Model

Sentinel Hub Cloud Detector for Sentinel-2 images in Python

Download and process satellite imagery in Python using Sentinel Hub services.

Generator for CRC HDL code (VHDL, Verilog, MyHDL)

Nucleo-H743ZI_SDMMC

AUTOMATIC VHDL GENERATION FOR CNN MODELS

SPI Master and Slave components to be used in all of FPGAs, written in VHDL.

VHDL library 4 FPGAs

SPI Master for FPGA - VHDL and Verilog

VHDL course at Brno University of Technology

Flexible VHDL library

VHDL Samples

simple VHDL UART

SDRAM Tester implemented in FPGA

SPI master and SPI slave for FPGA written in VHDL

Simple UART controller for FPGA written in VHDL

This is a cheat sheet for vhdl to help when in doubt about syntax or building blocks.

Library of VHDL components that are useful in larger designs.

The main purpose of this repo is to quickly write data to a flash memory attached to the SPI.

Examples for MSP430F5438 compiled with Code Composer Studio

msp430f5438a电赛

电赛msp430项目准备

A smartwatch using FreeRTOS under MSP430F5438