unix: update riscv64 hwprobe to Linux kernel 6.10

Change-Id: Ic74816df459b17302a3ba746060b49e987e5da5c Reviewed-on: https://go-review.googlesource.com/c/sys/+/604435 Reviewed-by: Mark Ryan <markdryan@rivosinc.com> Reviewed-by: Carlos Amedee <carlos@golang.org> Auto-Submit: Ian Lance Taylor <iant@google.com> Reviewed-by: Ian Lance Taylor <iant@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
golang · Aug 16, 2024 · c64c51d · c64c51d
1 parent da77c6b
commit c64c51d
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diff --git a/unix/linux/types.go b/unix/linux/types.go
@@ -451,13 +451,46 @@ struct my_can_bittiming_const {
 #define		RISCV_HWPROBE_EXT_ZBA		(1 << 3)
 #define		RISCV_HWPROBE_EXT_ZBB		(1 << 4)
 #define		RISCV_HWPROBE_EXT_ZBS		(1 << 5)
+#define		RISCV_HWPROBE_EXT_ZICBOZ	(1 << 6)
+#define		RISCV_HWPROBE_EXT_ZBC		(1 << 7)
+#define		RISCV_HWPROBE_EXT_ZBKB		(1 << 8)
+#define		RISCV_HWPROBE_EXT_ZBKC		(1 << 9)
+#define		RISCV_HWPROBE_EXT_ZBKX		(1 << 10)
+#define		RISCV_HWPROBE_EXT_ZKND		(1 << 11)
+#define		RISCV_HWPROBE_EXT_ZKNE		(1 << 12)
+#define		RISCV_HWPROBE_EXT_ZKNH		(1 << 13)
+#define		RISCV_HWPROBE_EXT_ZKSED		(1 << 14)
+#define		RISCV_HWPROBE_EXT_ZKSH		(1 << 15)
+#define		RISCV_HWPROBE_EXT_ZKT		(1 << 16)
+#define		RISCV_HWPROBE_EXT_ZVBB		(1 << 17)
+#define		RISCV_HWPROBE_EXT_ZVBC		(1 << 18)
+#define		RISCV_HWPROBE_EXT_ZVKB		(1 << 19)
+#define		RISCV_HWPROBE_EXT_ZVKG		(1 << 20)
+#define		RISCV_HWPROBE_EXT_ZVKNED	(1 << 21)
+#define		RISCV_HWPROBE_EXT_ZVKNHA	(1 << 22)
+#define		RISCV_HWPROBE_EXT_ZVKNHB	(1 << 23)
+#define		RISCV_HWPROBE_EXT_ZVKSED	(1 << 24)
+#define		RISCV_HWPROBE_EXT_ZVKSH		(1 << 25)
+#define		RISCV_HWPROBE_EXT_ZVKT		(1 << 26)
+#define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)
+#define		RISCV_HWPROBE_EXT_ZFHMIN	(1 << 28)
+#define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)
+#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)
+#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1ULL << 31)
+#define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)
+#define		RISCV_HWPROBE_EXT_ZTSO		(1ULL << 33)
+#define		RISCV_HWPROBE_EXT_ZACAS		(1ULL << 34)
+#define		RISCV_HWPROBE_EXT_ZICOND	(1ULL << 35)
+#define		RISCV_HWPROBE_EXT_ZIHINTPAUSE	(1ULL << 36)
 #define RISCV_HWPROBE_KEY_CPUPERF_0	5
 #define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)
 #define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)
 #define		RISCV_HWPROBE_MISALIGNED_SLOW		(2 << 0)
 #define		RISCV_HWPROBE_MISALIGNED_FAST		(3 << 0)
 #define		RISCV_HWPROBE_MISALIGNED_UNSUPPORTED	(4 << 0)
 #define		RISCV_HWPROBE_MISALIGNED_MASK		(7 << 0)
+#define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE	6
+#define RISCV_HWPROBE_WHICH_CPUS	(1 << 0)
 
 struct riscv_hwprobe {};
 #endif
@@ -5906,13 +5939,46 @@ const (
 	RISCV_HWPROBE_EXT_ZBA                = C.RISCV_HWPROBE_EXT_ZBA
 	RISCV_HWPROBE_EXT_ZBB                = C.RISCV_HWPROBE_EXT_ZBB
 	RISCV_HWPROBE_EXT_ZBS                = C.RISCV_HWPROBE_EXT_ZBS
+	RISCV_HWPROBE_EXT_ZICBOZ             = C.RISCV_HWPROBE_EXT_ZICBOZ
+	RISCV_HWPROBE_EXT_ZBC                = C.RISCV_HWPROBE_EXT_ZBC
+	RISCV_HWPROBE_EXT_ZBKB               = C.RISCV_HWPROBE_EXT_ZBKB
+	RISCV_HWPROBE_EXT_ZBKC               = C.RISCV_HWPROBE_EXT_ZBKC
+	RISCV_HWPROBE_EXT_ZBKX               = C.RISCV_HWPROBE_EXT_ZBKX
+	RISCV_HWPROBE_EXT_ZKND               = C.RISCV_HWPROBE_EXT_ZKND
+	RISCV_HWPROBE_EXT_ZKNE               = C.RISCV_HWPROBE_EXT_ZKNE
+	RISCV_HWPROBE_EXT_ZKNH               = C.RISCV_HWPROBE_EXT_ZKNH
+	RISCV_HWPROBE_EXT_ZKSED              = C.RISCV_HWPROBE_EXT_ZKSED
+	RISCV_HWPROBE_EXT_ZKSH               = C.RISCV_HWPROBE_EXT_ZKSH
+	RISCV_HWPROBE_EXT_ZKT                = C.RISCV_HWPROBE_EXT_ZKT
+	RISCV_HWPROBE_EXT_ZVBB               = C.RISCV_HWPROBE_EXT_ZVBB
+	RISCV_HWPROBE_EXT_ZVBC               = C.RISCV_HWPROBE_EXT_ZVBC
+	RISCV_HWPROBE_EXT_ZVKB               = C.RISCV_HWPROBE_EXT_ZVKB
+	RISCV_HWPROBE_EXT_ZVKG               = C.RISCV_HWPROBE_EXT_ZVKG
+	RISCV_HWPROBE_EXT_ZVKNED             = C.RISCV_HWPROBE_EXT_ZVKNED
+	RISCV_HWPROBE_EXT_ZVKNHA             = C.RISCV_HWPROBE_EXT_ZVKNHA
+	RISCV_HWPROBE_EXT_ZVKNHB             = C.RISCV_HWPROBE_EXT_ZVKNHB
+	RISCV_HWPROBE_EXT_ZVKSED             = C.RISCV_HWPROBE_EXT_ZVKSED
+	RISCV_HWPROBE_EXT_ZVKSH              = C.RISCV_HWPROBE_EXT_ZVKSH
+	RISCV_HWPROBE_EXT_ZVKT               = C.RISCV_HWPROBE_EXT_ZVKT
+	RISCV_HWPROBE_EXT_ZFH                = C.RISCV_HWPROBE_EXT_ZFH
+	RISCV_HWPROBE_EXT_ZFHMIN             = C.RISCV_HWPROBE_EXT_ZFHMIN
+	RISCV_HWPROBE_EXT_ZIHINTNTL          = C.RISCV_HWPROBE_EXT_ZIHINTNTL
+	RISCV_HWPROBE_EXT_ZVFH               = C.RISCV_HWPROBE_EXT_ZVFH
+	RISCV_HWPROBE_EXT_ZVFHMIN            = C.RISCV_HWPROBE_EXT_ZVFHMIN
+	RISCV_HWPROBE_EXT_ZFA                = C.RISCV_HWPROBE_EXT_ZFA
+	RISCV_HWPROBE_EXT_ZTSO               = C.RISCV_HWPROBE_EXT_ZTSO
+	RISCV_HWPROBE_EXT_ZACAS              = C.RISCV_HWPROBE_EXT_ZACAS
+	RISCV_HWPROBE_EXT_ZICOND             = C.RISCV_HWPROBE_EXT_ZICOND
+	RISCV_HWPROBE_EXT_ZIHINTPAUSE        = C.RISCV_HWPROBE_EXT_ZIHINTPAUSE
 	RISCV_HWPROBE_KEY_CPUPERF_0          = C.RISCV_HWPROBE_KEY_CPUPERF_0
 	RISCV_HWPROBE_MISALIGNED_UNKNOWN     = C.RISCV_HWPROBE_MISALIGNED_UNKNOWN
 	RISCV_HWPROBE_MISALIGNED_EMULATED    = C.RISCV_HWPROBE_MISALIGNED_EMULATED
 	RISCV_HWPROBE_MISALIGNED_SLOW        = C.RISCV_HWPROBE_MISALIGNED_SLOW
 	RISCV_HWPROBE_MISALIGNED_FAST        = C.RISCV_HWPROBE_MISALIGNED_FAST
 	RISCV_HWPROBE_MISALIGNED_UNSUPPORTED = C.RISCV_HWPROBE_MISALIGNED_UNSUPPORTED
 	RISCV_HWPROBE_MISALIGNED_MASK        = C.RISCV_HWPROBE_MISALIGNED_MASK
+	RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE  = C.RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE
+	RISCV_HWPROBE_WHICH_CPUS             = C.RISCV_HWPROBE_WHICH_CPUS
 )
 
 type SchedAttr C.struct_sched_attr

diff --git a/unix/ztypes_linux_riscv64.go b/unix/ztypes_linux_riscv64.go