Branch for version 1.7

catonblack · Jun 26, 2020 · 8065eef · 8065eef
1 parent 0555dd8
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diff --git a/README.md b/README.md
@@ -1,6 +1,6 @@
-# EH1 SweRV RISC-V Core<sup>TM</sup> 1.6 from Western Digital
+# EH1 SweRV RISC-V Core<sup>TM</sup> 1.7 from Western Digital
 
-This repository contains the SweRV EH1 ver 1.6 Core<sup>TM</sup>  design RTL
+This repository contains the SweRV EH1 Core<sup>TM</sup>  design RTL
 
 ## License
 
@@ -28,7 +28,7 @@ Files under the [tools](tools/) directory may be available under a different lic
 
 ## Dependencies
 
-- Verilator **(4.020 or later)** must be installed on the system if running with verilator
+- Verilator **(4.030 or later)** must be installed on the system if running with verilator
 - If adding/removing instructions, espresso must be installed (used by *tools/coredecode*)
 - RISCV tool chain (based on gcc version 7.3 or higher) must be
 installed so that it can be used to prepare RISCV binaries to run.
@@ -192,7 +192,12 @@ The `$RV_ROOT/testbench/hex` directory contains precompiled hex files of the tes
 
 
 **Building an FPGA speed optimized model:**  
-Use ``-fpga_optimize=1`` option to ``swerv.config`` to build a model that is removes clock gating logic from flop model so that the FPGA builds can run a higher speeds.
+Use ``-fpga_optimize=1`` option to ``swerv.config`` to build a model that removes clock gating logic from flop model so that the FPGA builds can run at higher speeds. **This is now the default option for
+targets other than ``default_pd``.**
+
+**Building a Power optimized model (ASIC flows):**  
+Use ``-fpga_optimize=0`` option to ``swerv.config`` to build a model that **enables** clock gating logic into the flop model so that the ASIC flows get a better power footprint. **This is now the default option for
+target``default_pd``.**
 
 ----
 Western Digital, the Western Digital logo, G-Technology, SanDisk, Tegile, Upthere, WD, SweRV Core, SweRV ISS, 

diff --git a/configs/swerv.config b/configs/swerv.config
@@ -270,6 +270,7 @@ if ($target eq "default") {
     if (!defined($pic_offset))        { $pic_offset="0xc0000"; } # 3*256*1024
     if (!defined($pic_size))          { $pic_size=32; }
     if (!defined($pic_total_int))     { $pic_total_int=8; }
+    if (!defined($fpga_optimize))     { $fpga_optimize=1; }
 
     # default is AXI bus
 }
@@ -295,6 +296,7 @@ elsif ($target eq "default_ahb") {
     if (!defined($pic_offset))        { $pic_offset="0xc0000"; } # 3*256*1024
     if (!defined($pic_size))          { $pic_size=32; }
     if (!defined($pic_total_int))     { $pic_total_int=8; }
+    if (!defined($fpga_optimize))     { $fpga_optimize=1; }
     $ahb_lite = 1;
 
 } elsif ($target eq "default_pd") {
@@ -319,6 +321,7 @@ elsif ($target eq "default_ahb") {
     if (!defined($pic_offset))        { $pic_offset="0xc0000"; } # 3*256*1024
     if (!defined($pic_size))          { $pic_size=32; }
     if (!defined($pic_total_int))     { $pic_total_int=8; }
+    if (!defined($fpga_optimize))     { $fpga_optimize=0; }
 
 } elsif ($target eq "high_perf") {
     if (!defined($ret_stack_size))    { $ret_stack_size=4; }
@@ -342,6 +345,7 @@ elsif ($target eq "default_ahb") {
     if (!defined($pic_offset))        { $pic_offset="0xc0000"; } # 3*256*1024
     if (!defined($pic_size))          { $pic_size=32; }
     if (!defined($pic_total_int))     { $pic_total_int=8; }
+    if (!defined($fpga_optimize))     { $fpga_optimize=1; }
 
 } else {
     die "$self: ERROR! Unsupported target \"$target\". Supported targets are: \"default, default_ahb, default_pd, high_perf\"!\n";
@@ -413,7 +417,7 @@ our %csr = (#{{{
        "exists"        => "true",
    },
    "mimpid" => {
-       "reset"         => "0x3",
+       "reset"         => "0x4",
        "mask"          => "0x0",
        "exists"        => "true",
    },
@@ -890,7 +894,7 @@ our %config = (#{{{
         "external_prog"     => 'derived, overridable',                  # Testbench only
         "debug_sb_mem"      => 'derived, overridable',                  # Testbench only
         "external_data_1"   => 'derived, overridable',                  # Testbench only
-        "external_mem_hole"   => 'derived, overridable',                # Testbench only
+        "external_mem_hole"   => 'default disabled',                    # Testbench only
 #       "consoleio"         => 'derived',   # Part of serial io.
     },
     "bus" => {
@@ -1376,55 +1380,54 @@ if (hex($config{protection}{data_access_enable0}) > 0 ||
     hex($config{protection}{inst_access_enable4}) > 0 ||
     hex($config{protection}{inst_access_enable5}) > 0 ||
     hex($config{protection}{inst_access_enable6}) > 0 ||
-    hex($config{protection}{inst_access_enable7}) > 0) {
+    hex($config{protection}{inst_access_enable7}) > 0 ||
+    $config{memmap}{external_mem_hole} eq "default disabled"){
     delete($config{memmap}{external_mem_hole}) ;
 } else {
-    # Unused region to create a memory map hole
-    for (my $rgn = 15;$rgn >= 0; $rgn--) {
-        if (!defined($regions_used{$rgn})) {
-            $config{memmap}{external_mem_hole} = ($rgn << 28);
-            $regions_used{$rgn} = 1;
-            last;
+    # Unused region to create a memory map hole, if not already specified
+    if ($config{memmap}{external_mem_hole} eq "derived, overridable") {
+        for (my $rgn = 15;$rgn >= 0; $rgn--) {
+            if (!defined($regions_used{$rgn})) {
+                $config{memmap}{external_mem_hole} = ($rgn << 28);
+                $regions_used{$rgn} = 1;
+                last;
+            }
         }
-    }
-    if ($config{memmap}{external_mem_hole} == 0) {
-        $config{protection}{data_access_addr0} = "0x10000000";
-        $config{protection}{data_access_mask0} = "0xffffffff";
-        $config{protection}{data_access_enable0} = "1";
-    } elsif (($config{memmap}{external_mem_hole}>>28) == 16) {
-        $config{protection}{data_access_addr0} = "0x00000000";
-        $config{protection}{data_access_mask0} = "0xefffffff";
-        $config{protection}{data_access_enable0} = "1";
     } else {
-        my $hreg = $config{memmap}{external_mem_hole}>>28;
-        $config{protection}{data_access_addr0} = sprintf("0x%x", (($hreg^8)&8)<<28);
-        $config{protection}{data_access_mask0} = "0x7fffffff";
-        $config{protection}{data_access_addr1} = sprintf("0x%x", ($hreg&8) << 28 |(($hreg^4)&4)<<28);
-        $config{protection}{data_access_mask1} = "0x3fffffff";
-        $config{protection}{data_access_addr2} = sprintf("0x%x", ($hreg&12) <<28 | (($hreg^2)&2) <<28);
-        $config{protection}{data_access_mask2} = "0x1fffffff";
-        $config{protection}{data_access_addr3} = sprintf("0x%x", ($hreg&14) << 28 |(($hreg^1)&1)<<28);
-        $config{protection}{data_access_mask3} = "0x0fffffff";
-        $config{protection}{data_access_enable0} = "1";
-        $config{protection}{data_access_enable1} = "1";
-        $config{protection}{data_access_enable2} = "1";
-        $config{protection}{data_access_enable3} = "1";
-        $config{protection}{inst_access_addr0} = sprintf("0x%x", (($hreg^8)&8)<<28);
-        $config{protection}{inst_access_mask0} = "0x7fffffff";
-        $config{protection}{inst_access_addr1} = sprintf("0x%x", ($hreg&8) << 28 |(($hreg^4)&4)<<28);
-        $config{protection}{inst_access_mask1} = "0x3fffffff";
-        $config{protection}{inst_access_addr2} = sprintf("0x%x", ($hreg&12) <<28 | (($hreg^2)&2) <<28);
-        $config{protection}{inst_access_mask2} = "0x1fffffff";
-        $config{protection}{inst_access_addr3} = sprintf("0x%x", ($hreg&14) << 28 |(($hreg^1)&1)<<28);
-        $config{protection}{inst_access_mask3} = "0x0fffffff";
-        $config{protection}{inst_access_enable0} = "1";
-        $config{protection}{inst_access_enable1} = "1";
-        $config{protection}{inst_access_enable2} = "1";
-        $config{protection}{inst_access_enable3} = "1";
+        my $rgn = hex($config{memmap}{external_mem_hole})>>28;
+        $config{memmap}{external_mem_hole} = ($rgn << 28);
+        $regions_used{$rgn} =1;
     }
+    my $hreg = $config{memmap}{external_mem_hole}>>28;
+    $config{protection}{data_access_addr0} = sprintf("0x%x", (($hreg^8)&8)<<28);
+    $config{protection}{data_access_mask0} = "0x7fffffff";
+    $config{protection}{data_access_addr1} = sprintf("0x%x", ($hreg&8) << 28 |(($hreg^4)&4)<<28);
+    $config{protection}{data_access_mask1} = "0x3fffffff";
+    $config{protection}{data_access_addr2} = sprintf("0x%x", ($hreg&12) <<28 | (($hreg^2)&2) <<28);
+    $config{protection}{data_access_mask2} = "0x1fffffff";
+    $config{protection}{data_access_addr3} = sprintf("0x%x", ($hreg&14) << 28 |(($hreg^1)&1)<<28);
+    $config{protection}{data_access_mask3} = "0x0fffffff";
+    $config{protection}{data_access_enable0} = "1";
+    $config{protection}{data_access_enable1} = "1";
+    $config{protection}{data_access_enable2} = "1";
+    $config{protection}{data_access_enable3} = "1";
+    $config{protection}{inst_access_addr0} = sprintf("0x%x", (($hreg^8)&8)<<28);
+    $config{protection}{inst_access_mask0} = "0x7fffffff";
+    $config{protection}{inst_access_addr1} = sprintf("0x%x", ($hreg&8) << 28 |(($hreg^4)&4)<<28);
+    $config{protection}{inst_access_mask1} = "0x3fffffff";
+    $config{protection}{inst_access_addr2} = sprintf("0x%x", ($hreg&12) <<28 | (($hreg^2)&2) <<28);
+    $config{protection}{inst_access_mask2} = "0x1fffffff";
+    $config{protection}{inst_access_addr3} = sprintf("0x%x", ($hreg&14) << 28 |(($hreg^1)&1)<<28);
+    $config{protection}{inst_access_mask3} = "0x0fffffff";
+    $config{protection}{inst_access_enable0} = "1";
+    $config{protection}{inst_access_enable1} = "1";
+    $config{protection}{inst_access_enable2} = "1";
+    $config{protection}{inst_access_enable3} = "1";
+
     $config{memmap}{external_mem_hole} = sprintf("0x%08x", $config{memmap}{external_mem_hole});
 }
 
+
 #Define 5 unused regions for used in TG
 
 foreach my $unr (reverse(0 .. 15)) {