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merge master to release 2.2.0 #2799

Merged
merged 55 commits into from
Dec 27, 2022
Merged

merge master to release 2.2.0 #2799

merged 55 commits into from
Dec 27, 2022

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anandaravuri
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pcolberg and others added 30 commits September 12, 2022 14:42
This commit has been tested on an Intel C6100 ADP.

Signed-off-by: Peter Colberg <peter.colberg@intel.com>
…#2726)

* Host Exerciser:  Add support support max 4k vectors and remove hardcode vector number

Read the  VFIO Number of interrupts are supported  on that function instead of having it hardcoded as currently

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>

* Host Exerciser: fix typo

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
Adds the config file parsing code for libopae-c, fpgainfo, and
fpgad to the libopae-c build.
Add "mcp" configuration to opae.cfg, as it still persists in
libopae-c's default device table.

refactor fpgad to use the one opae.cfg file API.
Remove fpgad.cfg from the installed files lists in packaging.

Print the loaded config tables in libopae-c and fpgad for debug
builds.

Refactor fpgainfo so that it acquires its platform_data_table
via the common config file parsing code.

Add a check for LIBOPAE_CFGFILE as the first possibility in
opae_find_cfg_file() in support of non-standard environments.

Implement new opae.admin.config module which loads and parses
configuration data for rsu.py and fpgareg.py at module load
time.

Implement new module opae.io.config to parse and create internal
config data for opae.io. Integrate that new module with opae.io's
ls command.

Query the value of $HOME and search in the home config file locations
relative to that path before trying the password database's version of
the home directory. This should more closely match the use of pathlib
in the Python search code.

libopae-v.so uses the same configuration table format as libopae-c.
Unlike libopae-c.so, the libopae-v.so plugin does not modify the
config data table (and it doesn't use the fields that libopae-c
modifies). With this in mind, it is ok for the two libraries to
share the same (if only the default) version of the config data
table without conflict.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Some of the "rsu" entries in the config file had "configuration"
instead of "fpga_default_sequences". Change them to
"fpga_default_sequences" to match the parsing code.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Add utility script opae-clean.py to aid in scrubbing systems
when a local install from source is present. A common issue
encountered with local installs from source is that cleaning a
system of installed artifacts is nearly impossible once the
source/build tree has been removed. Using opae-clean.py,
particularly with the --deep flag can help remedy this
situation.

The script can be run from any directory, so long as the
relative positions to the project files are unchanged. For
RedHat-based installs, the script scans opae.spec.fedora in
the root of the git tree. For Debian-based installs,
packages/opae/deb/*.(install|dirs) are used.

A typical usage is to run the script without parameters, or with
the --deep parameter. The script will report what files and
directories it thinks are likely candidates to scrub; but at this
point, nothing will be removed. After you have carefully examined
the list of files and directories reported, the script can be
re-executed with the -D switch to remove the target files and
directories (given that sufficient privilege is held to do so).

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
The previous implementation erroneously treated 1001 as the
n5010 VF. Also, removes default fpga boot sequence treatment
from n5010 (and 5011), based on feedback from Silicom.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Based on feedback, it is unnecessary/undesirable to require the
PR_AUTH_CERT during SR programming.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
These test cases were erroneously calling functions
without a prior call to opae_ioctl_initialize(). This
resulted in a NULL check failure and a subsequent
FPGA_EXCEPTION.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
(re)-enables ASE as of the new config file format. Hook to allow
enumerating the ASE device when WITH_ASE is set in the environment.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Remove invalid test free_adapter_err0. The test case was dependent
on dlclose() behaving nicely when a dl handle was double-freed. This
depedency proved false during nightly regression, where it caused a
seg fault.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
opae_plugin_mgr_alloc_adapter() was saving the value of its lib_path
parameter directly in the adapter. This could lead to problems if,
for example opae_plugin_mgr_register_plugin() were to pass through
a stack-based path. The fix involves using strdup() and free() in the
alloc and free adapter calls.

With the string fix in place, we add a check to
opae_plugin_mgr_register_adapter() to prevent duplicate entries in the
list. This could happen when, eg ASE loads via
opae_plugin_mgr_register_plugin() but is also present in the
configuration file passed to fpgaInitialize(). Duplicate adapter entries
would mean duplicate tokens during enumeration. The uniqueness check
guarantees that we won't duplicate any tokens.

Add unit tests for opae_plugin_mgr_register_plugin().

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: anandaravuri <ananda.ravuri@intel.com>

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
Remove explicit mentions of .so deps from the control file
and let ${shlibs:Depends} do its thing.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
This commit has been tested on an Intel C6100 ADP.

Bump versions to opae.io 0.2.5 and opaevfio 1.0.3.

Replaces #2721

Closes #2729

See DPDK/dpdk@2fc3502

Reported-by: Roger Christensen <rc@silicom.dk>
Signed-off-by: Peter Colberg <peter.colberg@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Co-authored-by: Peter Colberg <peter.colberg@intel.com>
Fixes a segfault observed when --port was missing from the command
line.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
…eneric N5010 for all

Signed-off-by: Roger Christensen <rc@silicom.dk>
* ase: add VF device when WITH_ASE present.

Michael mentioned some ASE test cases that require the DID to be
0x0a5e. We'll change the DID of the VF0 back to 0x0a5e, and we'll
make the subsystem device id 0x0a5f for the VF0.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
* Fix fpgainfo events power on time stamp

SW should use the information in block with magic number '0x53696CF0' to derive power on event time stamp, and not the timestamp field of magic number '  0x53696C12'.
Power on status is logged immediately after power on.  Time of the day information is written by SW into a BMC register. This write will take some time after power on and hence with Power on log there is no timestamp value available. Because of this reason, second block 'time of the day offset' (block with magic number '0x53696CF0' ) is provided from BMC. BMC internally keeps track of time lapse after the power on and first ToD write by Host and provides the correct value by reverse calculation.  Please use this information to print the power on status time

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
tswhison and others added 17 commits December 13, 2022 09:57
Use --dry-run so that no code is changed, -Werror so that the process
exit code is non-zero when a style violation is detected.
Check the process exit code to determine pass/fail.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
#2784)

* add support to uiox as input string to opaeuio, read8/16, write8/16 to pyopaeuio

  - add support to uiox  input string to opaeuio open function
     users can pass dfl_dev.x or uiox to open function

   - add read8/16, write8/16, get size function to pyopaeuio

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
Co-authored-by: Tim Whisonant <tim.whisonant@intel.com>
#2782)

* Add ofs.uio tool to peek, poke, mailbox read/write/dump dfl uio csr region

  - Enumerates fpga deive ,  dfl feature id and   dfl uio devices
  - Opens UIO device, MMAP’s memory and access registers
  - Tool supports command line options peek, poke, mailbox read/write/dump uio registers.
  - User can read/write 8,16,32,64 bit field registers.

 usage: ofs.uio.py [-h] [--pcie-address PCIE_ADDRESS] [--uio uio] [--feature-id FEATURE_ID] [--region-index REGION_INDEX]
                  [--mailbox-cmdcsr offset] [--bit-size {8,16,32,64}] [--peek offset] [--poke POKE POKE] [--mailbox-read offset]
    	           [--mailbox-dump MAILBOX_DUMP MAILBOX_DUMP] [--mailbox-write MAILBOX_WRITE MAILBOX_WRITE]

optional arguments:
  -h, --help            show this help message and exit
  --pcie-address PCIE_ADDRESS, -P PCIE_ADDRESS
                        sbdf of device to program (e.g. 0000:04:00.0). Optional when one device in system.
  --uio uio             uio dev name (e.g.--uio uio0 --peek 0x8 )
  --feature-id FEATURE_ID, -f FEATURE_ID
                        DFL UIO Feature id (e.g.--feature-id 0x20 --peek 0x8 )
  --region-index REGION_INDEX, -r REGION_INDEX
                        dfl uio region index (e.g.--uio uio0 --region-index 0x0 --peek 0x8 ). (e.g.--uio uio0 --region-index 0x1 --poke
                        0x8 0x123)
  --mailbox-cmdcsr offset
                        Mailbox command CSR offset (e.g.--mailbox-cmdcsr 0x40 --mailbox-read 0x8 ). (e.g.--mailbox-cmdcsr 0x40 --mailbox-
                        write 0x8 0x123)
  --bit-size {8,16,32,64}, -b {8,16,32,64}
                        peek/poke bit field size (e.g.--bit-size 64 --peek 0x8). (e.g.--bit-size 32 --poke 0x8 0xabc)
  --peek offset         Peek CSR offset (e.g.--peek 0x8).
  --poke POKE POKE      Poke CSR offset value (e.g.--poke 0x8 0xabcd).
  --mailbox-read offset
                        Read Mailbox CSR address (e.g.--mailbox-read 0x8).
  --mailbox-dump MAILBOX_DUMP MAILBOX_DUMP
                        Reads Mailbox CSR start address size (e.g.--mailbox-dump 0x0 0x20).
  --mailbox-write MAILBOX_WRITE MAILBOX_WRITE
                        Write Mailbox CSR address Value (e.g.--mailbox-write 0x8 0x1234).

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
Co-authored-by: Tim Whisonant <tim.whisonant@intel.com>
- install opae packages, ofs.uo runtime python search in wrong dist-packages folders
     python interprets uio.ofs.uio:main  as uio/ofs/uio.py :main in setup.py
     rename ofs.uio.py to ofs_uio.py python interprets uio.ofs_uio:main as uio/ofs_uio.py :main in setup.py

  - user calls pyopae_uio  close() without open() cause sigfault.
     memset struct opae_uio to zero in pyopaeui.h

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
Also, fix an exposed test issue:

If treating the return value from opae_uio_open() as an
fpga_result, the tests should not check for specific values, eg
FPGA_NOT_FOUND. They should only check for inequality against
FPGA_OK.

EXPECT_EQ(..., FPGA_NOT_FOUND) -> EXPECT_NE(..., FPGA_OK)

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
- fix fedora spec file
 - remove ofs.uio from rhel spec file
   because of rhel doesn't   support pyopeauio

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
#2790)

* Fix ofs.uio error message for Multiple FPGAs and duplicate  feature ids

     - fix uiox regular expression
     - update error strings
     - ofs.uio error shows message if finds Multiple FPGAs and feature ids

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
* Updating fedora35 build to create new RPMs
* Add fedora36 RPM build

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
* Disable centos7.6 job

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
github will be deprecating node12-based actions by summer of 2023.
checkout@v3 is developed for node16.

https://github.blog/changelog/2022-09-22-github-actions-all-actions-will-begin-running-on-node16-instead-of-node12/

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Updating to the node16 version of this, per the following deprecation
notice:

https://github.blog/changelog/2022-09-22-github-actions-all-actions-will-begin-running-on-node16-instead-of-node12/

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
* Run clang-format on pyopaeuio.cpp

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Use lychee instead of peter-evans/link-checker, which is deprecated.

Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
* ofs.uio: add markdown document

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
Co-authored-by: Tim Whisonant <tim.whisonant@intel.com>
Merge branch 'master' into release/2.2.0

Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
@anandaravuri anandaravuri requested review from a team as code owners December 27, 2022 17:55
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tswhison
tswhison previously approved these changes Dec 27, 2022
Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
@anandaravuri anandaravuri merged commit 0b4517d into release/2.2.0 Dec 27, 2022
@anandaravuri anandaravuri deleted the aravuri/cp_master branch December 27, 2022 19:23
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6 participants