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cocotb_fix_makefile_vcs_args Public
Forked from cocotb/cocotbcocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
Python BSD 3-Clause "New" or "Revised" License UpdatedJun 19, 2024 -
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int4_mm Public template
Forked from efabless/caravel_user_projecthttps://caravel-user-project.readthedocs.io
Verilog Apache License 2.0 UpdatedApr 2, 2024 -
Computer Arithmetics: A library of modules for half-precision floating point arithmetic
MIT License UpdatedFeb 5, 2024 -
basics-graphics-music-verilator-cocotb-support Public
Forked from yuri-panchul/basics-graphics-musicFPGA exercise for beginners
SystemVerilog Other UpdatedAug 19, 2023 -
scr1 Public
Forked from syntacore/scr1SCR1 is a high-quality open-source RISC-V MCU core in Verilog
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DCcontroller Public
Программное управление блоком питания Agilent E3648A. C#
C# UpdatedOct 16, 2022 -
spau Public
Forked from openhwgroup/cvfpuParametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
SystemVerilog Other UpdatedOct 16, 2022 -
schoolRISCV_ICache Public
Академический проект для исследования прироста производительности процессора в зависимости от конфигурации Иерархии Памяти
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chiselv Public
Forked from carlosedp/chiselvA RISC-V Core (RV32I) written in Chisel HDL
Scala BSD 3-Clause "New" or "Revised" License UpdatedDec 9, 2021 -
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mdu Public
Forked from zeeshanrafique23/mduM-extension for RISC-V cores.
Verilog Apache License 2.0 UpdatedSep 23, 2021 -
schoolRISCV Public
Forked from zhelnio/schoolRISCVCPU microarchitecture, step by step
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SimpleCacheController Public
Advanced Material: Implementing Cache Controllers
SystemVerilog UpdatedSep 6, 2021 -
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caravel Public
Forked from efabless/caravel_mpw-oneCaravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
Verilog Apache License 2.0 UpdatedMay 20, 2021 -
skywater-pdk Public
Forked from google/skywater-pdkOpen source process design kit for usage with SkyWater Technology Foundry's 130nm node.
Python Apache License 2.0 UpdatedMay 12, 2021 -
awesome-latticeFPGAs Public
Forked from kelu124/awesome-latticeFPGAs📖 List of FPGA Lattice boards using open tools
1 UpdatedApr 18, 2021 -
awesome-canbus Public
Forked from iDoka/awesome-canbus🚛 A curated list of awesome CAN bus tools, hardware and resources
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Altera-Cyclone-IV-board-V3.0 Public
Forked from jvitkauskas/Altera-Cyclone-IV-board-V3.0Documentation for Chinese ALTERA Cyclone IV EP4CE6 FPGA Development Board
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fpga.play.pub Public
Forked from electronut/fpga.play.pubLow cost open source Lattice iCE40UP5k FPGA board.
UpdatedJul 12, 2020 -
riscv-boom Public
Forked from riscv-boom/riscv-boomSonicBOOM: The Berkeley Out-of-Order Machine
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fpga_101 Public
Forked from litex-hub/fpga_101FPGA 101 lessons/labs
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hdl Public
Forked from analogdevicesinc/hdlHDL libraries and projects
Verilog Other UpdatedJun 12, 2020 -
basic_verilog Public
Forked from pConst/basic_verilogMust-have verilog systemverilog modules
Verilog UpdatedMay 22, 2020 -
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DDLM Public
Forked from RomeoMe5/DDLMИсходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)