Pinned Loading
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OpenLane
OpenLane PublicForked from The-OpenROAD-Project/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
Python
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OpenROAD
OpenROAD PublicForked from The-OpenROAD-Project/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Verilog
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rv-thunder
rv-thunder PublicForked from merledu/rv-thunder
RISC-V 32-bit CPU written in amaranth-hdl (python-lib)
Verilog
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sscs-ose/sscs-ose-code-a-chip.github.io
sscs-ose/sscs-ose-code-a-chip.github.io PublicIEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)
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