Capture retired instructions of a RISC-V Core and compress them to a sequence of packets.

A Primer on Memory Consistency and Cache Coherence (Second Edition) 翻译计划

C11标准的原子操作详解

LLVM Backend tutorial Cpu0

Source code of the simulator used in the Mosaic paper from MICRO 2017: "Mosaic: A GPU Memory Manager with Application-Transparent Support for Multiple Page Sizes" https://people.inf.ethz.ch/omutlu/…

An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端…