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A repository that aims to provide tools for cryptography and cryptanalysis
QEMU libsystemctlm-soc co-simulation demos.
ntrdma / rdma-core
Forked from linux-rdma/rdma-coreRDMA core userspace libraries and daemons
PCIe (1.0a to 2.0) Virtual host model for verilog
PCIE 5.0 Graduation project (Verification Team)
List of awesome open source hardware tools, generators, and reusable designs
A List of Free and Open Source Hardware Verification Tools and Frameworks
tancheng / pymtl3.1
Forked from pymtl/pymtl3Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
Verification of 128-bit AES Pipelined Cipher block using UVM methodology
signature algorithm,Interface security verification。
Formal verification of Advanced Encryption Standard (AES)
System on Chip verified with UVM/OSVVM/FV
rswarbrick / style-guides
Forked from lowRISC/style-guideslowRISC Style Guides
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Powerful, fast and robust engine for converting 3D models into g-code instructions for 3D printers. It is part of the larger open source project Cura.
VUnit is a unit testing framework for VHDL/SystemVerilog
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
The root repo for lowRISC project and FPGA demos.