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Remove --enable-histogram option
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It's now redundant.
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aswaterman committed Dec 21, 2022
1 parent 7831b3e commit b5f68dc
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Showing 4 changed files with 0 additions and 29 deletions.
3 changes: 0 additions & 3 deletions config.h.in
Original file line number Diff line number Diff line change
Expand Up @@ -105,9 +105,6 @@
/* Enable support for running target in either endianness */
#undef RISCV_ENABLE_DUAL_ENDIAN

/* Enable PC histogram generation */
#undef RISCV_ENABLE_HISTOGRAM

/* Enable hardware support for misaligned loads and stores */
#undef RISCV_ENABLE_MISALIGNED

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14 changes: 0 additions & 14 deletions configure
Original file line number Diff line number Diff line change
Expand Up @@ -715,7 +715,6 @@ with_isa
with_priv
with_varch
with_target
enable_histogram
enable_dirty
enable_misaligned
enable_dual_endian
Expand Down Expand Up @@ -1361,7 +1360,6 @@ Optional Features:
--enable-stow Enable stow-based install
--enable-optional-subprojects
Enable all optional subprojects
--enable-histogram Enable PC histogram generation
--enable-dirty Enable hardware management of PTE accessed and dirty
bits
--enable-misaligned Enable hardware support for misaligned loads and
Expand Down Expand Up @@ -6051,18 +6049,6 @@ else
as_fn_error $? "libpthread is required" "$LINENO" 5
fi
# Check whether --enable-histogram was given.
if test "${enable_histogram+set}" = set; then :
enableval=$enable_histogram;
fi
if test "x$enable_histogram" = "xyes"; then :
$as_echo "#define RISCV_ENABLE_HISTOGRAM /**/" >>confdefs.h
fi
# Check whether --enable-dirty was given.
if test "${enable_dirty+set}" = set; then :
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7 changes: 0 additions & 7 deletions riscv/processor.cc
Original file line number Diff line number Diff line change
Expand Up @@ -519,13 +519,6 @@ void processor_t::set_debug(bool value)
void processor_t::set_histogram(bool value)
{
histogram_enabled = value;
#ifndef RISCV_ENABLE_HISTOGRAM
if (value) {
fprintf(stderr, "PC Histogram support has not been properly enabled;");
fprintf(stderr, " please re-build the riscv-isa-sim project using \"configure --enable-histogram\".\n");
abort();
}
#endif
}

void processor_t::enable_log_commits()
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5 changes: 0 additions & 5 deletions riscv/riscv.ac
Original file line number Diff line number Diff line change
Expand Up @@ -39,11 +39,6 @@ AC_SEARCH_LIBS([dlopen], [dl dld], [

AC_CHECK_LIB(pthread, pthread_create, [], [AC_MSG_ERROR([libpthread is required])])

AC_ARG_ENABLE([histogram], AS_HELP_STRING([--enable-histogram], [Enable PC histogram generation]))
AS_IF([test "x$enable_histogram" = "xyes"], [
AC_DEFINE([RISCV_ENABLE_HISTOGRAM],,[Enable PC histogram generation])
])

AC_ARG_ENABLE([dirty], AS_HELP_STRING([--enable-dirty], [Enable hardware management of PTE accessed and dirty bits]))
AS_IF([test "x$enable_dirty" = "xyes"], [
AC_DEFINE([RISCV_ENABLE_DIRTY],,[Enable hardware management of PTE accessed and dirty bits])
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