gem5-ref: fix different SC sync behavior on GEM5

Kconfig

@@ -261,6 +261,11 @@ config DIFFTEST_STORE_COMMIT
   bool "Maintain a committed store queue for processor ref"
   default y
 
+config DIFFTEST_REF_FOR_GEM5
+  depends on SHARE
+  bool "Always copy lrsc valid to lr valid for GEM5"
+  default n
+
 config DIFFTEST_STORE_COMMIT_AMO
   depends on DIFFTEST_STORE_COMMIT
   bool "Also record store requests by AMO instructions"

configs/riscv64-gem5-ref_defconfig

@@ -0,0 +1,129 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# NEMU Configuration Menu
+#
+# CONFIG_ISA_x86 is not set
+# CONFIG_ISA_mips32 is not set
+# CONFIG_ISA_riscv32 is not set
+CONFIG_ISA_riscv64=y
+CONFIG_ISA="riscv64"
+CONFIG_ILEN_MIN=2
+CONFIG_ISA64=y
+
+#
+# ISA-dependent Options for riscv64
+#
+CONFIG_CLINT_MMIO=0x38000000
+# CONFIG_MULTICORE_DIFF is not set
+CONFIG_RVB=y
+CONFIG_RVK=y
+# CONFIG_RVV is not set
+CONFIG_RV_DEBUG=y
+# CONFIG_RVH is not set
+# CONFIG_RVSDEXT is not set
+# CONFIG_RVSDTRIG is not set
+CONFIG_RV_PMP_CSR=y
+CONFIG_RV_PMP_NUM=16
+CONFIG_PMP_GRANULARITY=12
+CONFIG_RV_PMP_CHECK=y
+CONFIG_RV_SVINVAL=y
+CONFIG_MISA_UNCHANGEABLE=y
+CONFIG_XTVEC_VECTORED_MODE=y
+# CONFIG_TVAL_EX_II is not set
+CONFIG_FS_CLEAN_STATE=y
+CONFIG_RV_ARCH_CSRS=y
+CONFIG_USE_XS_ARCH_CSRS=y
+# end of ISA-dependent Options for riscv64
+
+CONFIG_ENGINE_INTERPRETER=y
+CONFIG_ENGINE="interpreter"
+CONFIG_MODE_SYSTEM=y
+# CONFIG_MODE_USER is not set
+
+#
+# Build Options
+#
+CONFIG_CC_GCC=y
+# CONFIG_CC_GPP is not set
+# CONFIG_CC_CLANG is not set
+CONFIG_CC="gcc"
+# CONFIG_CC_O0 is not set
+# CONFIG_CC_O1 is not set
+CONFIG_CC_O2=y
+# CONFIG_CC_O3 is not set
+CONFIG_CC_OPT="-O2"
+# CONFIG_CC_LTO is not set
+# CONFIG_CC_DEBUG is not set
+# CONFIG_CC_ASAN is not set
+# end of Build Options
+
+#
+# Testing and Debugging
+#
+# CONFIG_DEBUG is not set
+CONFIG_DIFFTEST_REF_PATH="none"
+CONFIG_DIFFTEST_REF_NAME="none"
+# CONFIG_DETERMINISTIC is not set
+# CONFIG_IQUEUE is not set
+# CONFIG_MEMLOG is not set
+# CONFIG_TRANSLOG is not set
+# CONFIG_EXITLOG is not set
+# CONFIG_TRACE_INST is not set
+# CONFIG_TRACE_BB is not set
+# end of Testing and Debugging
+
+#
+# Memory Configuration
+#
+CONFIG_MBASE=0x80000000
+CONFIG_MSIZE=0x200000000
+CONFIG_PADDRBITS=36
+CONFIG_STORE_LOG=y
+CONFIG_STORE_LOG_SIZE=1024
+# CONFIG_BR_LOG is not set
+CONFIG_BBL_OFFSET_WITH_CPT=0xa0000
+CONFIG_RESET_FROM_MMIO=y
+CONFIG_PC_RESET_OFFSET=0x0
+CONFIG_MMIO_RESET_VECTOR=0x10000000
+CONFIG_USE_MMAP=y
+# CONFIG_MEM_RANDOM is not set
+# CONFIG_MEM_COMPRESS is not set
+# end of Memory Configuration
+
+CONFIG_DEVICE=y
+# CONFIG_HAS_UARTLITE is not set
+# CONFIG_HAS_VGA is not set
+CONFIG_HAS_FLASH=y
+CONFIG_FLASH_PRESET_CONTENT="0x0010029b,0x01f29293,0x00028067"
+CONFIG_FLASH_START_ADDR=0x10000000
+CONFIG_FLASH_SIZE=0x100000
+CONFIG_FLASH_IMG_PATH=""
+# CONFIG_FPU_HOST is not set
+CONFIG_FPU_SOFT=y
+# CONFIG_FPU_NONE is not set
+# CONFIG_AC_HOST is not set
+CONFIG_AC_SOFT=y
+# CONFIG_AC_NONE is not set
+
+#
+# Processor difftest reference config
+#
+CONFIG_SHARE=y
+CONFIG_DIFFTEST_STORE_COMMIT=y
+CONFIG_DIFFTEST_REF_FOR_GEM5=y
+# CONFIG_DIFFTEST_STORE_COMMIT_AMO is not set
+CONFIG_GUIDED_EXEC=y
+CONFIG_QUERY_REF=y
+CONFIG_LARGE_COPY=y
+# CONFIG_PANIC_ON_UNIMP_CSR is not set
+# end of Processor difftest reference config
+
+#
+# Miscellaneous
+#
+CONFIG_TIMER_GETTIMEOFDAY=y
+# CONFIG_TIMER_CLOCK_GETTIME is not set
+# CONFIG_REPORT_ILLEGAL_INSTR is not set
+CONFIG_RT_CHECK=y
+CONFIG_ENABLE_INSTR_CNT=y
+# end of Miscellaneous

src/isa/riscv64/difftest/ref.c

@@ -222,9 +222,13 @@ void isa_difftest_uarchstatus_cpy(void *dut, bool direction) {
 
   if (direction == DIFFTEST_TO_REF) {
     struct SyncState* ms = (struct SyncState*)dut;
+#if CONFIG_DIFFTEST_REF_FOR_GEM5
+    cpu.lr_valid = ms->lrscValid;
+#else
     if (ms->lrscValid) { // this is actually sc_failed
       cpu.lr_valid = 0;
     }
+#endif
   } else {
     struct SyncState ms;
     ms.lrscValid = cpu.lr_valid;