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[Arc] Infer StateOp reset from CompReg #4997

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merged 10 commits into from
Apr 14, 2023
Merged

[Arc] Infer StateOp reset from CompReg #4997

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78bdeb0
Copy reset from CompReg to StateOp (reset currently unchecked)
TaoBi22 Apr 11, 2023
b52305b
Add checks that the reset value is valid
TaoBi22 Apr 11, 2023
08ca1c3
Update comments
TaoBi22 Apr 11, 2023
c31be99
clang-format
TaoBi22 Apr 11, 2023
dbd7031
Update to error on reset inference when StateOp already has a reset
TaoBi22 Apr 12, 2023
fda7273
Fix non-trivial reset assignment
TaoBi22 Apr 12, 2023
0f88cd5
Add compreg reset inference integration test
TaoBi22 Apr 12, 2023
2197394
Return on multiple reset error
TaoBi22 Apr 12, 2023
185343f
clang-format
TaoBi22 Apr 12, 2023
8d77815
Move inference test into ConvertToArcs tests and remove unnecessary C…
TaoBi22 Apr 12, 2023
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@TaoBi22
TaoBi22 committed Apr 11, 2023
commit 08ca1c34875e89d43d0f1e9b33adf0571ee0c4b6
4 changes: 2 additions & 2 deletions lib/Conversion/ConvertToArcs/ConvertToArcs.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -284,7 +284,7 @@ LogicalResult Converter::absorbRegs(HWModuleOp module) {
clock = regOp.getClk();
reset = regOp.getReset();

// Check that if there is a reset, it is to a constant zero
// Check that if the register has a reset, it is to a constant zero
if (reset) {
Value resetValue = regOp.getResetValue();
Operation *op = resetValue.getDefiningOp();
Expand Down Expand Up @@ -316,7 +316,7 @@ LogicalResult Converter::absorbRegs(HWModuleOp module) {
++numTrivialRegs;

// Set the arc's clock to the clock of the registers we've absorbed, bump
// the latency up by one to account for the registers, add the reset and
// the latency up by one to account for the registers, add the reset if present and
// update the output names. Then replace the registers.
arc.getClockMutable().assign(clock);
arc.setLatency(arc.getLatency() + 1);
Expand Down