Integrating into a real Quartus Project

[Eirikalb]

As every other FPGA engineer in the world I am frustrated at the compile times of my tools. I see in one your papers, you mention that you use icc2 from synplify. I also see here that all you need is an LEF file, a DEF file and .AUX and a Verilog file.

This sounds like it should be possible to plug straight into my EDA tool of choice, say Vivado or Quartus. Have you tried doing this yet?

If not I would love to try for it. The only thing that makes me pause is the single verilog file. Ideally I would want to try to simply push my whole project through your tool, is that possible yet?

Actually I see that the DREAMGAN project has done something very similar to what I want to do:

I am currently using quartus. Do you think its possible to integrate this tool into quartus in the same way DREAMGAN did with synopsys?

[limbo018]

Hi, DREAMPlace is designed for ASIC, not for FPGA. If you are looking for P&R tools for FPGA, please take a look at our other project OpenPARF, which is for FPGA P&R.

https://github.com/PKU-IDEA/OpenPARF